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ATmega128
Assembly Code Example
C Example
Comments
1
ldi
r16,
TWCR = (1<<TWINT)|(1<<TWSTA)|
(1<<TWINT)|(1<<TWSTA)|
(1<<TWEN)
TWCR, r16
out
(1<<TWEN)
Send START condition
2
wait1:
while (!(TWCR & (1<<TWINT)))
in
r16,TWCR
;
W ait for T W INT flag set. This indicates that the
sbrs r16,TWINT
rjmp wait1
START condition has been transmitted
3
in
r16,TWSR
if ((TWSR & 0xF8) != START)
andi r16, 0xF8
cpi r16, START
brne ERROR
ERROR();
Check value of T W I Status Register. Mask
prescaler bits. If status different from START
go to ERROR
ldi
r16, SLA_W
TWDR = SLA_W;
out
ldi
TWDR, r16
r16, (1<<TWINT) |
TWCR = (1<<TWINT) |
(1<<TWEN);
Load SLA_ W into T W DR Register. Clear
T W INT bit in T W CR to start transmission of
(1<<TWEN)
address
out
TWCR, r16
4
wait2:
while (!(TWCR & (1<<TWINT)))
in r16,TWCR
sbrs r16,TWINT
rjmp wait2
;
W ait for T W INT flag set. This indicates that the
SLA+ W has been transmitted, and
ACK/NACK has been received.
5
in
r16,TWSR
if ((TWSR & 0xF8) !=
andi r16, 0xF8
cpi r16, MT_SLA_ACK
brne ERROR
MT_SLA_ACK)
ERROR();
Check value of T W I Status Register. Mask
prescaler bits. If status different from
MT_SLA_ACK go to ERROR
ldi
out
r16, DATA
TWDR, r16
TWDR = DATA;
TWCR = (1<<TWINT) |
ldi
r16, (1<<TWINT) |
(1<<TWEN);
Load DATA into T W DR Register. Clear T W INT
bit in T W CR to start transmission of data
(1<<TWEN)
out
TWCR, r16
6
wait3:
while (!(TWCR & (1<<TWINT)))
in r16,TWCR
sbrs r16,TWINT
rjmp wait3
;
W ait for T W INT flag set. This indicates that the
DATA has been transmitted, and ACK/NACK
has been received.
7
in
r16,TWSR
if ((TWSR & 0xF8) !=
andi r16, 0xF8
cpi r16, MT_DATA_ACK
brne ERROR
MT_DATA_ACK)
ERROR();
Check value of T W I Status Register. Mask
prescaler bits. If status different from
MT_DATA_ACK go to ERROR
ldi
r16,
TWCR = (1<<TWINT)|(1<<TWEN)|
(1<<TWINT)|(1<<TWEN)|
(1<<TWSTO)
TWCR, r16
out
(1<<TWSTO);
Transmit STOP condition
Note:
For I/O registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions must be replaced with
instructions that allow access to extended I/O. Typically “LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
211
2467X–AVR–06/11
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